SambaNova, founded by alumnus Kunle Olukotun, emerges from stealth mode with AI-accelerated HPC system
Co-founded by alumnus Kunle Olukotun, the company has announced product and system-as-a-service solutions for AI-intensive applications.
As artificial intelligence applications grow and multiply, researchers have been racing to design a new generation of hardware that meets the unique computational needs of those applications. The market for these “AI chips” is booming, and a key player in this new space is Palo Alto based SambaNova Systems.
SambaNova, now a unicorn valued at over $2.5 billion, was co-founded by alumnus Kunle Olukotun (BSE EE ’85; MSE PhD CSE ’87 ’91), Rodrigo Liang, and Christopher Ré in 2017. Olukotun serves as the company’s Chief Technologist.
SambaNova’s approach, stemming from work by Olukotun and Ré at Stanford University, has been to create a new platform from scratch that is optimized specifically for AI operations, rather than scaling existing architectures.
The company has now emerged from stealth mode to announce its first product, a system-level AI accelerator for hyperscale and enterprise data centers and high performance computing (HPC) applications.
SambaNova is selling various configurations of this rack-based system, called DataScale, as well as renting them out for a monthly subscription in an offering the company calls “Dataflow-as-a-service.”
DataScale is optimized for dataflow from the algorithms to the silicon, enabling enterprises to bring new AI-driven services and products to market faster than today’s state-of-the-art solutions.
The DataScale system is based on multiples of the company’s 8-chip node called the SN10-8, combined with the company’s SambaFlow software stack and a high-speed fabric for direct connection between reconfigurable dataflow unit (RDU) chips.
DataScale is a result of Olukotun’s focus on building the new standard for applications ranging from image processing aboard self-driving vehicles to training models for complex medical problems.
SambaNova already has systems installed at the Argonne National Laboratory, the Department of Energy’s National Nuclear Security Administration (NNSA), Lawrence Livermore National Laboratory (LLNL), and Los Alamos National Laboratory (LANL).
“At Argonne National Laboratory we’re working on important research efforts including those focused on cancer, Covid-19, and many others, and using AI to automate parts of the development process is key to our success,” said Rick Stevens, associate laboratory director, Argonne National Laboratory, in a statement. “The SambaNova DataScale architecture offers us the ability to train and infer from multiple large and small models concurrently and deliver orders of magnitude performance improvements over GPUs.”
Olukotun, the “father of multi-core processors” and Cadence Design Systems Professor of Electrical Engineering and Computer Science at Stanford, revolutionized computing in the 1990s with his work on Stanford’s Hydra chip multiprocessor (CMP). This project brought about multi-core technology as we know it today, where it is commonplace in consumer and high-end computing systems.
Following his development of the Hydra CMP system, Olukotun founded Afara Websystems, a company that designed and manufactured low power server systems with chip multiprocessor technology. With Afara he developed the multi-core processor Niagara, later acquired by Sun Microsystems. Niagara-derived microprocessors currently power Oracle SPARC-based servers.
In other research, Olukotun made significant advances in the development of transactional memory technology to simplify multicore programming, and he also pioneered the use of domain-specific languages for programming heterogeneous computer systems. While at Michigan, he was advised by Bredt Family Professor of Engineering Trevor Mudge.
Olukotun now leads the Stanford Pervasive Parallelism Lab, which focuses on making heterogeneous parallel computing easy to use, and he is a member of the Data Analytics for What’s Next (DAWN) Lab, which is developing infrastructure for usable machine learning.